Recently, due to a miniaturization of a semiconductor integrated circuit apparatus, a diameter of copper (Cu) via plug formed in an interlayer insulation film has been reduced from 65 nm to 45 nm. Further, it is expected that a diameter of a via plug will be further reduced to 32 nm or 22 nm in near future.
As the miniaturization is progressed in the semiconductor integrated circuit apparatus, the conventional CVD method has a difficulty in depositing a barrier metal film or Cu seed layer on a fine via hole or wiring groove in terms of a step coverage. Therefore, a deposition technique using MOCVD method or ALD method through which an excellent step coverage can be achieved draws attention. Since the interlayer insulation film (low-k film) consisting of low dielectric materials widely used recently tends to be damaged by heat, it is considered that a film deposition by MOCVD method or ALD method is carried out at a low temperature at which low-k film is not damaged.
In the meantime, since a metal compound in which metal atoms are bonded with an organic group is generally used as a raw material in the MOCVD method or ALD method, impurities are likely to remain in a formed film. Therefore, even though the formed film seems to have an excellent step coverage at first glance, the quality of the film is unstable. For example, in a case where the Cu-plated seed layer is formed on Ta barrier metal film by the MOCVD method, an aggregation can be easily generated in the seed layer so that it is difficult to stably deposit a seed layer that covers the Ta barrier metal film with a uniform film thickness. When an electroplating is performed for the Cu layer using the seed layer that generated the aggregation as an electrode, potential defects are included in the Cu layer which fills the wiring groove or via hole to cause problems, such as for example, an increase in electrical resistance as well as a degradation of either electro-migration resistance or stress migration tolerance.
Accordingly, there has been proposed a method in which a barrier metal film or seed layer is directly formed on the interlayer insulation layer by MOCVD method using metal carbonyl raw material (e.g., Patent Documents 1 and 2). The metal carbonyl raw material can be easily pyrolyzed at a relatively low temperature to form a metal film and CO gas serving as ligand of the metal carbonyl raw material is exhausted outside a deposition reaction system without remaining in the formed film, so that a high-quality barrier metal film or seed layer having very few impurities can be formed. With the above-described method, it is possible to form W film using, for example, W(CO)6, as the barrier metal film, or Ru film using, for example, Ru3(CO)12, as the seed layer.
In this case, since the metal carbonyl raw material has a characteristic that decomposes very easily at a relatively low temperature, CO gas having a decomposition suppressing function is utilized as a carrier gas. A source gas consisting of the metal carbonyl raw material is supplied from a shower head installed at a ceiling part of a processing container to be deposited by, for example, CVD method, on a semiconductor wafer mounted on a mounting platform to be heated.
However, when depositing a film by supplying the metal carbonyl source gas using the shower head, a film thickness of the central portion of the semiconductor wafer which is the workpiece increases and the film thickness gradually decreases as it goes to the periphery of the semiconductor wafer.
Therefore, as a deposition device capable of avoiding the problems described above, a deposition device has been proposed in which a baffle plate is installed at a ceiling part of a processing container instead of a shower head, an annular internal partition wall is installed to surround a processing space within a processing container, and the source gas is supplied toward the area further outside than the outer peripheral end of the semiconductor wafer mounted on a mounting platform from a gas discharge port installed at the peripheral edges of the baffle part (Patent Document 3). In the deposition device, most of the source gas supplied to the processing space downwardly from the gas discharge port installed at the peripheral edges of the baffle part flows downwardly and a portion of the source gas is diffused to flow toward a central portion of the processing space, so that a thin film is formed on a surface of the semiconductor wafer which is the workpiece. In the meantime, a gas contained in the processing space is exhausted toward downward from an annular gas outlet formed between a lower end of an inner partition wall and the mounting platform.